First commit
This commit is contained in:
File diff suppressed because one or more lines are too long
@@ -0,0 +1,175 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
File.Version=6
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32F446RET6
|
||||
Mcu.Family=STM32F4
|
||||
Mcu.IP0=NVIC
|
||||
Mcu.IP1=RCC
|
||||
Mcu.IP2=SYS
|
||||
Mcu.IP3=USART2
|
||||
Mcu.IPNb=4
|
||||
Mcu.Name=STM32F446R(C-E)Tx
|
||||
Mcu.Package=LQFP64
|
||||
Mcu.Pin0=PC13
|
||||
Mcu.Pin1=PC14-OSC32_IN
|
||||
Mcu.Pin10=PB3
|
||||
Mcu.Pin11=VP_SYS_VS_Systick
|
||||
Mcu.Pin2=PC15-OSC32_OUT
|
||||
Mcu.Pin3=PH0-OSC_IN
|
||||
Mcu.Pin4=PH1-OSC_OUT
|
||||
Mcu.Pin5=PA2
|
||||
Mcu.Pin6=PA3
|
||||
Mcu.Pin7=PA5
|
||||
Mcu.Pin8=PA13
|
||||
Mcu.Pin9=PA14
|
||||
Mcu.PinsNb=12
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F446RETx
|
||||
MxCube.Version=6.8.0
|
||||
MxDb.Version=DB.6.0.80
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:false
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
|
||||
PA13.GPIOParameters=GPIO_Label
|
||||
PA13.GPIO_Label=TMS
|
||||
PA13.Locked=true
|
||||
PA13.Mode=Serial_Wire
|
||||
PA13.Signal=SYS_JTMS-SWDIO
|
||||
PA14.GPIOParameters=GPIO_Label
|
||||
PA14.GPIO_Label=TCK
|
||||
PA14.Locked=true
|
||||
PA14.Mode=Serial_Wire
|
||||
PA14.Signal=SYS_JTCK-SWCLK
|
||||
PA2.GPIOParameters=GPIO_Label
|
||||
PA2.GPIO_Label=USART_TX
|
||||
PA2.Locked=true
|
||||
PA2.Mode=Asynchronous
|
||||
PA2.Signal=USART2_TX
|
||||
PA3.GPIOParameters=GPIO_Label
|
||||
PA3.GPIO_Label=USART_RX
|
||||
PA3.Locked=true
|
||||
PA3.Mode=Asynchronous
|
||||
PA3.Signal=USART2_RX
|
||||
PA5.GPIOParameters=GPIO_Label
|
||||
PA5.GPIO_Label=LD2 [Green Led]
|
||||
PA5.Locked=true
|
||||
PA5.Signal=GPIO_Output
|
||||
PB3.GPIOParameters=GPIO_Label
|
||||
PB3.GPIO_Label=SWO
|
||||
PB3.Locked=true
|
||||
PB3.Signal=SYS_JTDO-SWO
|
||||
PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
|
||||
PC13.GPIO_Label=B1 [Blue PushButton]
|
||||
PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
|
||||
PC13.Locked=true
|
||||
PC13.Signal=GPXTI13
|
||||
PC14-OSC32_IN.Locked=true
|
||||
PC14-OSC32_IN.Mode=LSE-External-Oscillator
|
||||
PC14-OSC32_IN.Signal=RCC_OSC32_IN
|
||||
PC15-OSC32_OUT.Locked=true
|
||||
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
|
||||
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
|
||||
PH0-OSC_IN.Locked=true
|
||||
PH0-OSC_IN.Mode=HSE-External-Oscillator
|
||||
PH0-OSC_IN.Signal=RCC_OSC_IN
|
||||
PH1-OSC_OUT.Locked=true
|
||||
PH1-OSC_OUT.Mode=HSE-External-Oscillator
|
||||
PH1-OSC_OUT.Signal=RCC_OSC_OUT
|
||||
PinOutPanel.RotationAngle=0
|
||||
ProjectManager.AskForMigrate=true
|
||||
ProjectManager.BackupPrevious=false
|
||||
ProjectManager.CompilerOptimize=6
|
||||
ProjectManager.ComputerToolchain=false
|
||||
ProjectManager.CoupleFile=false
|
||||
ProjectManager.CustomerFirmwarePackage=
|
||||
ProjectManager.DefaultFWLocation=true
|
||||
ProjectManager.DeletePrevious=true
|
||||
ProjectManager.DeviceId=STM32F446RETx
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1
|
||||
ProjectManager.FreePins=false
|
||||
ProjectManager.HalAssertFull=false
|
||||
ProjectManager.HeapSize=0x200
|
||||
ProjectManager.KeepUserCode=true
|
||||
ProjectManager.LastFirmware=true
|
||||
ProjectManager.LibraryCopy=0
|
||||
ProjectManager.MainLocation=Core/Src
|
||||
ProjectManager.NoMain=false
|
||||
ProjectManager.PreviousToolchain=
|
||||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=NucleoF446-Template.ioc
|
||||
ProjectManager.ProjectName=NucleoF446-Template
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=Makefile
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART2_UART_Init-USART2-false-HAL-true
|
||||
RCC.48MHZClocksFreq_Value=84000000
|
||||
RCC.AHBFreq_Value=16000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV2
|
||||
RCC.APB1Freq_Value=8000000
|
||||
RCC.APB1TimFreq_Value=16000000
|
||||
RCC.APB2Freq_Value=16000000
|
||||
RCC.APB2TimFreq_Value=16000000
|
||||
RCC.CECFreq_Value=32786.88524590164
|
||||
RCC.CortexFreq_Value=16000000
|
||||
RCC.EthernetFreq_Value=84000000
|
||||
RCC.FCLKCortexFreq_Value=16000000
|
||||
RCC.FLatency-AdvancedSettings=FLASH_LATENCY_0
|
||||
RCC.FMPI2C1Freq_Value=8000000
|
||||
RCC.FamilyName=M
|
||||
RCC.HCLKFreq_Value=16000000
|
||||
RCC.HSE_VALUE=8000000
|
||||
RCC.HSI_VALUE=16000000
|
||||
RCC.I2SClocksFreq_Value=96000000
|
||||
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FMPI2C1Freq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLN,PLLP,PLLQCLKFreq_Value,PLLRCLKFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PWRFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAIAFreq_Value,SAIBFreq_Value,SDIOFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,USBFreq_Value,VCOI2SInputFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutputFreq_Value,VCOSAIInputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S
|
||||
RCC.LSI_VALUE=32000
|
||||
RCC.MCO2PinFreq_Value=16000000
|
||||
RCC.PLLCLKFreq_Value=84000000
|
||||
RCC.PLLI2SPCLKFreq_Value=96000000
|
||||
RCC.PLLI2SQCLKFreq_Value=96000000
|
||||
RCC.PLLI2SRCLKFreq_Value=96000000
|
||||
RCC.PLLN=336
|
||||
RCC.PLLP=RCC_PLLP_DIV4
|
||||
RCC.PLLQCLKFreq_Value=168000000
|
||||
RCC.PLLRCLKFreq_Value=168000000
|
||||
RCC.PLLSAIPCLKFreq_Value=96000000
|
||||
RCC.PLLSAIQCLKFreq_Value=96000000
|
||||
RCC.PWRFreq_Value=16000000
|
||||
RCC.RTCFreq_Value=32000
|
||||
RCC.RTCHSEDivFreq_Value=4000000
|
||||
RCC.SAIAFreq_Value=96000000
|
||||
RCC.SAIBFreq_Value=96000000
|
||||
RCC.SDIOFreq_Value=168000000
|
||||
RCC.SPDIFRXFreq_Value=168000000
|
||||
RCC.SYSCLKFreq_VALUE=16000000
|
||||
RCC.USBFreq_Value=168000000
|
||||
RCC.VCOI2SInputFreq_Value=1000000
|
||||
RCC.VCOI2SOutputFreq_Value=192000000
|
||||
RCC.VCOInputFreq_Value=1000000
|
||||
RCC.VCOInputMFreq_Value=1000000
|
||||
RCC.VCOOutputFreq_Value=336000000
|
||||
RCC.VCOSAIInputFreq_Value=1000000
|
||||
RCC.VCOSAIOutputFreq_Value=192000000
|
||||
RCC.VcooutputI2S=96000000
|
||||
SH.GPXTI13.0=GPIO_EXTI13
|
||||
SH.GPXTI13.ConfNb=1
|
||||
USART2.IPParameters=VirtualMode
|
||||
USART2.VirtualMode=VM_ASYNC
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=NUCLEO-F446RE
|
||||
boardIOC=true
|
||||
@@ -0,0 +1,169 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by tool: [projectgenerator] version: [3.19.2] date: [Mon Apr 17 09:44:09 CEST 2023]
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
# Generic Makefile (based on gcc)
|
||||
#
|
||||
# ChangeLog :
|
||||
# 2017-02-10 - Several enhancements + project update mode
|
||||
# 2015-07-22 - first version
|
||||
# ------------------------------------------------
|
||||
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = NucleoF446-Bootloader
|
||||
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 0
|
||||
# optimization
|
||||
OPT = -Og
|
||||
|
||||
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
C_SOURCES = \
|
||||
src/main.c \
|
||||
src/usart2.c \
|
||||
src/TI_aes_128.c\
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES =
|
||||
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arm-none-eabi-
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
ifdef GCC_PATH
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size
|
||||
else
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
CPU = -mcpu=cortex-m4
|
||||
|
||||
# fpu
|
||||
FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# float-abi
|
||||
FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# mcu
|
||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines
|
||||
C_DEFS = \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32F446xx
|
||||
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES =
|
||||
|
||||
# C includes
|
||||
C_INCLUDES = \
|
||||
-ICore/Src
|
||||
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CFLAGS += $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -g -gdwarf-2
|
||||
endif
|
||||
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = STM32F446RETx_FLASH.ld
|
||||
|
||||
# libraries
|
||||
LIBS = -lc -lm -lnosys
|
||||
LIBDIR =
|
||||
LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
|
||||
# *** EOF ***
|
||||
@@ -0,0 +1,107 @@
|
||||
# Configuration file for the STM32 for VSCode extension
|
||||
# Arrays can be inputted in two ways. One is: [entry_1, entry_2, ..., entry_final]
|
||||
# or by adding an indented list below the variable name e.g.:
|
||||
# VARIABLE:
|
||||
# - entry_1
|
||||
# - entry_2
|
||||
|
||||
# The project name
|
||||
target: NucleoF446-Bootloader
|
||||
# Can be C or C++
|
||||
language: C
|
||||
|
||||
optimization: Og
|
||||
|
||||
# MCU settings
|
||||
targetMCU: stm32f4x
|
||||
cpu: cortex-m4 # type of cpu e.g. cortex-m4
|
||||
fpu: fpv4-sp-d16 # Defines how floating points are defined. Can be left empty.
|
||||
floatAbi: -mfloat-abi=hard
|
||||
ldscript: STM32F446RETx_FLASH.ld # linker script
|
||||
|
||||
# Compiler definitions. The -D prefix for the compiler will be automatically added.
|
||||
cDefinitions: []
|
||||
cxxDefinitions: []
|
||||
asDefinitions: []
|
||||
|
||||
# Compiler definition files. you can add a single files or an array of files for different definitions.
|
||||
# The file is expected to have a definition each new line.
|
||||
# This allows to include for example a .definition file which can be ignored in git and can contain
|
||||
# This can be convenient for passing along secrets at compile time, or generating a file for per device setup.
|
||||
cDefinitionsFile:
|
||||
cxxDefinitionsFile:
|
||||
asDefinitionsFile:
|
||||
|
||||
# Compiler flags
|
||||
cFlags:
|
||||
- -Wall
|
||||
- -fdata-sections
|
||||
- -ffunction-sections
|
||||
|
||||
cxxFlags: []
|
||||
assemblyFlags:
|
||||
- -Wall
|
||||
- -fdata-sections
|
||||
- -ffunction-sections
|
||||
|
||||
linkerFlags: []
|
||||
|
||||
# libraries to be included. The -l prefix to the library will be automatically added.
|
||||
libraries:
|
||||
- c
|
||||
- m
|
||||
|
||||
# Library directories. Folders can be added here that contain custom libraries.
|
||||
libraryDirectories: []
|
||||
|
||||
# Files or folders that will be excluded from compilation.
|
||||
# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used.
|
||||
# Do mind that double stars are reserved in yaml
|
||||
# these should be escaped with a: \ or the name should be in double quotes e.g. "**.test.**"
|
||||
excludes:
|
||||
- "**/Examples/**"
|
||||
- "**/examples/**"
|
||||
- "**/Example/**"
|
||||
- "**/example/**"
|
||||
- "**_template.*"
|
||||
|
||||
|
||||
# Include directories (directories containing .h or .hpp files)
|
||||
# If a CubeMX makefile is present it will automatically include the include directories from that makefile.
|
||||
includeDirectories:
|
||||
- Inc/**
|
||||
- Core/Inc/**
|
||||
- Core/Lib/**
|
||||
- Src/**
|
||||
- Core/Src/**
|
||||
- Core/Lib/**
|
||||
|
||||
|
||||
# Files that should be included in the compilation.
|
||||
# If a CubeMX makefile is present it will automatically include the c and cpp/cxx files from that makefile.
|
||||
# Glob patterns (https://www.wikiwand.com/en/Glob_(programming)) can be used.
|
||||
# Do mind that double stars are reserved in yaml
|
||||
# these should be escaped with a: \ or the name should be in double quotes e.g. "HARDWARE_DRIVER*.c"
|
||||
sourceFiles:
|
||||
- Src/**
|
||||
- Core/Src/**
|
||||
- Core/Lib/**
|
||||
|
||||
|
||||
# When no makefile is present it will show a warning pop-up.
|
||||
# However when compilation without the CubeMX Makefile is desired, this can be turned of.
|
||||
suppressMakefileWarning: false
|
||||
|
||||
# Custom makefile rules
|
||||
# Here custom makefile rules can be added to the STM32Make.make file
|
||||
# an example of how this can be used is commented out below.
|
||||
customMakefileRules:
|
||||
# - command: sayhello
|
||||
# rule: echo "hello"
|
||||
# dependsOn: $(BUILD_DIR)/$(TARGET).elf # can be left out
|
||||
|
||||
# Additional flags which will be used when invoking the make command
|
||||
makeFlags:
|
||||
# - -O # use this option when the output of make is mixed up only works for make version 4.0 and upwards
|
||||
# - --silent # use this option to silence the output of the build
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,189 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : STM32CubeMX
|
||||
**
|
||||
** Abstract : Linker script for STM32F446RETx series
|
||||
** 512Kbytes FLASH and 128Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(_mcu_start)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,235 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by STM32forVSCode
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
# Generic Makefile (based on gcc)
|
||||
#
|
||||
# ChangeLog :
|
||||
# 2017-02-10 - Several enhancements + project update mode
|
||||
# 2015-07-22 - first version
|
||||
# ------------------------------------------------
|
||||
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = NucleoF446-Bootloader
|
||||
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -Og
|
||||
|
||||
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
C_SOURCES = \
|
||||
Src/TI_aes_128.c \
|
||||
Src/main.c \
|
||||
Src/usart2.c
|
||||
|
||||
|
||||
CPP_SOURCES = \
|
||||
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
|
||||
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arm-none-eabi-
|
||||
POSTFIX = "
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
GCC_PATH="C:/Program Files (x86)/Arm GNU Toolchain arm-none-eabi/compiler/bin
|
||||
ifdef GCC_PATH
|
||||
CXX = $(GCC_PATH)/$(PREFIX)g++$(POSTFIX)
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX)
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy$(POSTFIX)
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size$(POSTFIX)
|
||||
else
|
||||
CXX = $(PREFIX)g++
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
CPU = -mcpu=cortex-m4
|
||||
|
||||
# fpu
|
||||
FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# float-abi
|
||||
FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# mcu
|
||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines
|
||||
C_DEFS = \
|
||||
-DSTM32F446xx \
|
||||
-DUSE_HAL_DRIVER
|
||||
|
||||
|
||||
# CXX defines
|
||||
CXX_DEFS = \
|
||||
-DSTM32F446xx \
|
||||
-DUSE_HAL_DRIVER
|
||||
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES = \
|
||||
|
||||
# C includes
|
||||
C_INCLUDES = \
|
||||
-ICore/Src \
|
||||
-ISrc
|
||||
|
||||
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CXXFLAGS = $(MCU) $(CXX_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -feliminate-unused-debug-types
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -g -gdwarf -ggdb
|
||||
CXXFLAGS += -g -gdwarf -ggdb
|
||||
endif
|
||||
|
||||
# Add additional flags
|
||||
CFLAGS += -Wall -fdata-sections -ffunction-sections
|
||||
ASFLAGS += -Wall -fdata-sections -ffunction-sections
|
||||
CXXFLAGS +=
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
CXXFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = STM32F446RETx_FLASH.ld
|
||||
|
||||
# libraries
|
||||
LIBS = -lc -lm -lnosys
|
||||
LIBDIR = \
|
||||
|
||||
|
||||
# Additional LD Flags from config file
|
||||
ADDITIONALLDFLAGS = -specs=nano.specs
|
||||
|
||||
LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of cpp program objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(CPP_SOURCES:.cpp=.o)))
|
||||
vpath %.cpp $(sort $(dir $(CPP_SOURCES)))
|
||||
|
||||
# list of C objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
|
||||
# list of ASM program objects
|
||||
# list of ASM program objects
|
||||
UPPER_CASE_ASM_SOURCES = $(filter %.S,$(ASM_SOURCES))
|
||||
LOWER_CASE_ASM_SOURCES = $(filter %.s,$(ASM_SOURCES))
|
||||
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(UPPER_CASE_ASM_SOURCES:.S=.o)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(LOWER_CASE_ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR)
|
||||
$(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cpp=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR)
|
||||
$(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cxx=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s STM32Make.make | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S STM32Make.make | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) STM32Make.make
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# flash
|
||||
#######################################
|
||||
flash: $(BUILD_DIR)/$(TARGET).elf
|
||||
"C:/ST/STM32TOOLCHAIN/OPENOCD/BIN/OPENOCD.EXE" -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit"
|
||||
|
||||
#######################################
|
||||
# erase
|
||||
#######################################
|
||||
erase: $(BUILD_DIR)/$(TARGET).elf
|
||||
"C:/ST/STM32TOOLCHAIN/OPENOCD/BIN/OPENOCD.EXE" -f ./openocd.cfg -c "init; reset halt; stm32f4x mass_erase 0; exit"
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
cmd /c rd /s /q $(BUILD_DIR)
|
||||
|
||||
#######################################
|
||||
# custom makefile rules
|
||||
#######################################
|
||||
|
||||
|
||||
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
|
||||
# *** EOF ***
|
||||
@@ -0,0 +1,8 @@
|
||||
#OpenOCD configuration file, generated by STM32 for VSCode
|
||||
|
||||
# Programmer, can be changed to several interfaces
|
||||
# Standard will be the stlink interface as this is the standard for STM32 dev boards
|
||||
source [find interface/stlink.cfg]
|
||||
|
||||
# The target MCU. This should match your board
|
||||
source [find target/stm32f4x.cfg]
|
||||
@@ -0,0 +1,231 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2011, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
/*
|
||||
* TI_aes_128.c
|
||||
*
|
||||
* Created on: Nov 3, 2011
|
||||
* Author: Eric Peeters
|
||||
*
|
||||
* Description: Implementation of the AES-128 as defined by the FIPS PUB 197:
|
||||
* the official AES standard
|
||||
*/
|
||||
|
||||
|
||||
// foreward sbox
|
||||
const unsigned char sbox[256] = {
|
||||
//0 1 2 3 4 5 6 7 8 9 A B C D E F
|
||||
0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, //0
|
||||
0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, //1
|
||||
0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, //2
|
||||
0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, //3
|
||||
0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, //4
|
||||
0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, //5
|
||||
0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, //6
|
||||
0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, //7
|
||||
0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, //8
|
||||
0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, //9
|
||||
0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, //A
|
||||
0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, //B
|
||||
0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, //C
|
||||
0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, //D
|
||||
0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, //E
|
||||
0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 }; //F
|
||||
|
||||
// inverse sbox
|
||||
const unsigned char rsbox[256] =
|
||||
{ 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
|
||||
, 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
|
||||
, 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
|
||||
, 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
|
||||
, 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
|
||||
, 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
|
||||
, 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
|
||||
, 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
|
||||
, 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
|
||||
, 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
|
||||
, 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
|
||||
, 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
|
||||
, 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
|
||||
, 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
|
||||
, 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
|
||||
, 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d };
|
||||
|
||||
// round constant
|
||||
const unsigned char Rcon[10] = {
|
||||
0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36};
|
||||
|
||||
|
||||
// multiply by 2 in the galois field
|
||||
unsigned char galois_mul2(unsigned char value)
|
||||
{
|
||||
signed char temp;
|
||||
// cast to signed value
|
||||
temp = (signed char) value;
|
||||
// if MSB is 1, then this will signed extend and fill the temp variable with 1's
|
||||
temp = temp >> 7;
|
||||
// AND with the reduction variable
|
||||
temp = temp & 0x1b;
|
||||
// finally shift and reduce the value
|
||||
return ((value << 1)^temp);
|
||||
}
|
||||
|
||||
// AES encryption and decryption function
|
||||
// The code was optimized for memory (flash and ram)
|
||||
// Combining both encryption and decryption resulted in a slower implementation
|
||||
// but much smaller than the 2 functions separated
|
||||
// This function only implements AES-128 encryption and decryption (AES-192 and
|
||||
// AES-256 are not supported by this code)
|
||||
void aes_enc_dec(unsigned char *state, unsigned char *key, unsigned char dir)
|
||||
{
|
||||
unsigned char buf1, buf2, buf3, buf4, round, i;
|
||||
|
||||
// In case of decryption
|
||||
if (dir) {
|
||||
// compute the last key of encryption before starting the decryption
|
||||
for (round = 0 ; round < 10; round++) {
|
||||
//key schedule
|
||||
key[0] = sbox[key[13]]^key[0]^Rcon[round];
|
||||
key[1] = sbox[key[14]]^key[1];
|
||||
key[2] = sbox[key[15]]^key[2];
|
||||
key[3] = sbox[key[12]]^key[3];
|
||||
for (i=4; i<16; i++) {
|
||||
key[i] = key[i] ^ key[i-4];
|
||||
}
|
||||
}
|
||||
|
||||
//first Addroundkey
|
||||
for (i = 0; i <16; i++){
|
||||
state[i]=state[i] ^ key[i];
|
||||
}
|
||||
}
|
||||
|
||||
// main loop
|
||||
for (round = 0; round < 10; round++){
|
||||
if (dir){
|
||||
//Inverse key schedule
|
||||
for (i=15; i>3; --i) {
|
||||
key[i] = key[i] ^ key[i-4];
|
||||
}
|
||||
key[0] = sbox[key[13]]^key[0]^Rcon[9-round];
|
||||
key[1] = sbox[key[14]]^key[1];
|
||||
key[2] = sbox[key[15]]^key[2];
|
||||
key[3] = sbox[key[12]]^key[3];
|
||||
} else {
|
||||
for (i = 0; i <16; i++){
|
||||
// with shiftrow i+5 mod 16
|
||||
state[i]=sbox[state[i] ^ key[i]];
|
||||
}
|
||||
//shift rows
|
||||
buf1 = state[1];
|
||||
state[1] = state[5];
|
||||
state[5] = state[9];
|
||||
state[9] = state[13];
|
||||
state[13] = buf1;
|
||||
|
||||
buf1 = state[2];
|
||||
buf2 = state[6];
|
||||
state[2] = state[10];
|
||||
state[6] = state[14];
|
||||
state[10] = buf1;
|
||||
state[14] = buf2;
|
||||
|
||||
buf1 = state[15];
|
||||
state[15] = state[11];
|
||||
state[11] = state[7];
|
||||
state[7] = state[3];
|
||||
state[3] = buf1;
|
||||
}
|
||||
//mixcol - inv mix
|
||||
if ((round > 0 && dir) || (round < 9 && !dir)) {
|
||||
for (i=0; i <4; i++){
|
||||
buf4 = (i << 2);
|
||||
if (dir){
|
||||
// precompute for decryption
|
||||
buf1 = galois_mul2(galois_mul2(state[buf4]^state[buf4+2]));
|
||||
buf2 = galois_mul2(galois_mul2(state[buf4+1]^state[buf4+3]));
|
||||
state[buf4] ^= buf1; state[buf4+1] ^= buf2; state[buf4+2] ^= buf1; state[buf4+3] ^= buf2;
|
||||
}
|
||||
// in all cases
|
||||
buf1 = state[buf4] ^ state[buf4+1] ^ state[buf4+2] ^ state[buf4+3];
|
||||
buf2 = state[buf4];
|
||||
buf3 = state[buf4]^state[buf4+1]; buf3=galois_mul2(buf3); state[buf4] = state[buf4] ^ buf3 ^ buf1;
|
||||
buf3 = state[buf4+1]^state[buf4+2]; buf3=galois_mul2(buf3); state[buf4+1] = state[buf4+1] ^ buf3 ^ buf1;
|
||||
buf3 = state[buf4+2]^state[buf4+3]; buf3=galois_mul2(buf3); state[buf4+2] = state[buf4+2] ^ buf3 ^ buf1;
|
||||
buf3 = state[buf4+3]^buf2; buf3=galois_mul2(buf3); state[buf4+3] = state[buf4+3] ^ buf3 ^ buf1;
|
||||
}
|
||||
}
|
||||
|
||||
if (dir) {
|
||||
//Inv shift rows
|
||||
// Row 1
|
||||
buf1 = state[13];
|
||||
state[13] = state[9];
|
||||
state[9] = state[5];
|
||||
state[5] = state[1];
|
||||
state[1] = buf1;
|
||||
//Row 2
|
||||
buf1 = state[10];
|
||||
buf2 = state[14];
|
||||
state[10] = state[2];
|
||||
state[14] = state[6];
|
||||
state[2] = buf1;
|
||||
state[6] = buf2;
|
||||
//Row 3
|
||||
buf1 = state[3];
|
||||
state[3] = state[7];
|
||||
state[7] = state[11];
|
||||
state[11] = state[15];
|
||||
state[15] = buf1;
|
||||
|
||||
for (i = 0; i <16; i++){
|
||||
// with shiftrow i+5 mod 16
|
||||
state[i]=rsbox[state[i]] ^ key[i];
|
||||
}
|
||||
} else {
|
||||
//key schedule
|
||||
key[0] = sbox[key[13]]^key[0]^Rcon[round];
|
||||
key[1] = sbox[key[14]]^key[1];
|
||||
key[2] = sbox[key[15]]^key[2];
|
||||
key[3] = sbox[key[12]]^key[3];
|
||||
for (i=4; i<16; i++) {
|
||||
key[i] = key[i] ^ key[i-4];
|
||||
}
|
||||
}
|
||||
}
|
||||
if (!dir) {
|
||||
//last Addroundkey
|
||||
for (i = 0; i <16; i++){
|
||||
// with shiftrow i+5 mod 16
|
||||
state[i]=state[i] ^ key[i];
|
||||
} // enf for
|
||||
} // end if (!dir)
|
||||
} // end function
|
||||
@@ -0,0 +1,44 @@
|
||||
/* --COPYRIGHT--,BSD
|
||||
* Copyright (c) 2011, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* --/COPYRIGHT--*/
|
||||
/*
|
||||
* TI_aes_128.h
|
||||
*
|
||||
* Created on: Nov 3, 2011
|
||||
* Author: Eric Peeters
|
||||
*/
|
||||
|
||||
#ifndef TI_OPT_AES_H_
|
||||
#define TI_OPT_AES_H_
|
||||
|
||||
void aes_enc_dec(unsigned char *state, unsigned char *key, unsigned char dir);
|
||||
|
||||
#endif /* TI_OPT_AES_H_ */
|
||||
@@ -0,0 +1,266 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.2
|
||||
* @date 19. April 2017
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
@@ -0,0 +1,21 @@
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
typedef uint8_t u8;
|
||||
typedef uint16_t u16;
|
||||
typedef uint32_t u32;
|
||||
typedef uint64_t u64;
|
||||
|
||||
typedef int8_t i8;
|
||||
typedef int16_t i16;
|
||||
typedef int32_t i32;
|
||||
typedef int64_t i64;
|
||||
|
||||
typedef float f32;
|
||||
typedef double f64;
|
||||
|
||||
|
||||
#define clr_bit(x,y) (x &= (~(y)) )
|
||||
#define set_bit(x,y) (x |= (y) )
|
||||
#define test_bit(x,y) ((x & y) != 0)
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,527 @@
|
||||
|
||||
#include "core.h"
|
||||
#include "stm32f446xx.h"
|
||||
|
||||
typedef uint32_t u32;
|
||||
typedef uint8_t u8;
|
||||
|
||||
|
||||
#define FCPU 16000000
|
||||
|
||||
/* Memory MACRO */
|
||||
#define APP_START_ADDRESS 0x08004000
|
||||
|
||||
#define SRAM_SIZE (128*1024)
|
||||
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
|
||||
|
||||
|
||||
#define ENABLE_BOOTLOADER_PROTECTION 0
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Startup and interrupt handler functions declaration */
|
||||
void _mcu_start (void);
|
||||
int main (void);
|
||||
void SysTick_Handler (void);
|
||||
void USART2_IRQHandler (void);
|
||||
|
||||
/* Minimal vector table needed by the bootloader */
|
||||
|
||||
u32 *vector_table [] __attribute__((section(".isr_vector"))) = {
|
||||
(u32*) SRAM_END, // MSP, initial stack pointer
|
||||
(u32*) _mcu_start, // main function as reset handler
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) 0,
|
||||
(u32*) SysTick_Handler,
|
||||
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
(u32*) USART2_IRQHandler
|
||||
};
|
||||
|
||||
|
||||
|
||||
u32 gTick = 0;
|
||||
|
||||
/* Systich Handler Routine placed in CMM memory*/
|
||||
void SysTick_Handler (void) {
|
||||
|
||||
gTick ++;
|
||||
}
|
||||
|
||||
u32 getTick (void) {
|
||||
return gTick;
|
||||
}
|
||||
|
||||
|
||||
|
||||
extern u32 _sidata;
|
||||
extern u32 _sdata;
|
||||
extern u32 _edata;
|
||||
|
||||
extern u32 _sbss;
|
||||
extern u32 _ebss;
|
||||
|
||||
void __initialize_data (u32 * flash_begin, u32 *data_begin, u32 * data_end) {
|
||||
u32 * ptr = data_begin;
|
||||
while (ptr < data_end) {
|
||||
*ptr++ = *flash_begin++;
|
||||
}
|
||||
}
|
||||
|
||||
void __initialize_bss (u32* bss_begin, u32* bss_end) {
|
||||
u32* ptr = bss_begin;
|
||||
while (ptr < bss_end) {
|
||||
*ptr++ = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void __attribute__ ((noreturn, weak)) _mcu_start (void) {
|
||||
__initialize_data (&_sidata, &_sdata, &_edata);
|
||||
__initialize_bss (&_sbss, &_ebss);
|
||||
main ();
|
||||
|
||||
for (;;);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#include "usart2.h"
|
||||
#include "TI_aes_128.h"
|
||||
#include <string.h>
|
||||
|
||||
|
||||
|
||||
#define ACK 0x79
|
||||
#define NACK 0x1f
|
||||
#define CMD_ERASE 0x43
|
||||
#define CMD_GETID 0x02
|
||||
#define CMD_WRITE 0x2b
|
||||
|
||||
|
||||
|
||||
#define LED_PIN 5
|
||||
#define LED_PORT GPIOA
|
||||
#define BTN_PIN 13
|
||||
#define BTN_PORT GPIOC
|
||||
|
||||
|
||||
#define GPIO_PIN_VALUE(port, pin) ((port->IDR &= (1<<pin)) != 0)
|
||||
#define GPIO_PIN_TOGGLE(port, pin) (port->ODR ^= (1<<pin))
|
||||
#define GPIO_PIN_SET_HIGH(port, pin) (port->BSRR |= (1<<pin))
|
||||
#define GPIO_PIN_SET_LOW(port, pin) (port->BSRR |= (1<<(pin+16)))
|
||||
|
||||
|
||||
#define PIN_VALUE(x) GPIO_PIN_VALUE(x##_PORT, x##_PIN)
|
||||
#define PIN_TOGGLE(x) GPIO_PIN_TOGGLE(x##_PORT, x##_PIN)
|
||||
#define PIN_SET_HIGH(x) GPIO_PIN_SET_HIGH(x##_PORT, x##_PIN)
|
||||
#define PIN_SET_LOW(x) GPIO_PIN_SET_LOW(x##_PORT, x##_PIN)
|
||||
|
||||
|
||||
|
||||
#define FLASH_KEY1 0x45670123U
|
||||
#define FLASH_KEY2 0xCDEF89ABU
|
||||
|
||||
#define FLASH_PSIZE_BYTE 0x00000000U
|
||||
#define FLASH_PSIZE_HALF_WORD 0x00000100U
|
||||
#define FLASH_PSIZE_WORD 0x00000200U
|
||||
#define FLASH_PSIZE_DOUBLE_WORD 0x00000300U
|
||||
#define CR_PSIZE_MASK 0xFFFFFCFFU
|
||||
|
||||
#define FLASH_VOLTAGE_RANGE_1 0x00000000U /*!< Device operating range: 1.8V to 2.1V */
|
||||
#define FLASH_VOLTAGE_RANGE_2 0x00000001U /*!< Device operating range: 2.1V to 2.7V */
|
||||
#define FLASH_VOLTAGE_RANGE_3 0x00000002U /*!< Device operating range: 2.7V to 3.6V */
|
||||
#define FLASH_VOLTAGE_RANGE_4 0x00000003U /*!< Device operating range: 2.7V to 3.6V + External Vpp */
|
||||
|
||||
#define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
|
||||
#define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
|
||||
#define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
|
||||
#define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
|
||||
#define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
|
||||
#define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
|
||||
#define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
|
||||
#define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
|
||||
|
||||
#define FLASH_SECTOR_TOTAL 8U
|
||||
|
||||
#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
|
||||
|
||||
u32 calculateCRC (u32 * buffer, u32 len);
|
||||
void FLASH_Unlock (void);
|
||||
void FLASH_Lock (void);
|
||||
void FLASH_Erase (u8 firstSector, u8 nbrSector, u8 voltageLevel);
|
||||
void FLASH_EraseSector (uint32_t Sector, uint8_t VoltageRange);
|
||||
void FLASH_WaitForLastOperation ();
|
||||
void FLASH_ProgramByte (uint32_t Address, u8 Data);
|
||||
|
||||
|
||||
|
||||
void cmdGetId (u8* buffer);
|
||||
void cmdErase (u8* buffer);
|
||||
void cmdWrite(u8* buffer);
|
||||
|
||||
uint8_t AES_KEY[] = { 0x4D, 0x61, 0x73, 0x74, 0x65, 0x72, 0x69, 0x6E,
|
||||
0x67, 0x20, 0x20, 0x53, 0x54, 0x4D, 0x33, 0x32 };
|
||||
|
||||
|
||||
|
||||
#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
|
||||
1 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority
|
||||
0 bits for subpriority */
|
||||
|
||||
|
||||
|
||||
|
||||
int main(void) {
|
||||
|
||||
NVIC_SetPriorityGrouping (NVIC_PRIORITYGROUP_4);
|
||||
|
||||
// enable clock for GPIO and GPIOC
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN_Msk | RCC_AHB1ENR_GPIOCEN_Msk;
|
||||
|
||||
|
||||
char buffer [20];
|
||||
|
||||
// configure systick for firing IR every 1ms
|
||||
SysTick_Config(FCPU/1000);
|
||||
|
||||
// configure GPIOA<5> as output
|
||||
GPIOA->MODER |= (0b01 << (2*LED_PIN));
|
||||
// GPIOC<13> is already in input mode
|
||||
|
||||
|
||||
// wait for 2 seconds for the user to press the User Button
|
||||
u32 tick = getTick (), blinkTick = tick;
|
||||
u8 upload = 0;
|
||||
|
||||
while (getTick () - tick < 2000) {
|
||||
if (PIN_VALUE (BTN) == 0) {
|
||||
upload = 1;
|
||||
break;
|
||||
}
|
||||
// blink led every 250ms
|
||||
if (getTick() - blinkTick > 250) {
|
||||
PIN_TOGGLE (LED);
|
||||
blinkTick = getTick();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
if (upload) {
|
||||
// wait for program flash
|
||||
|
||||
blinkTick = getTick ();
|
||||
u8 usartBuffer [20];
|
||||
usart2_init ();
|
||||
usart2_puts ("UPLOAD\n\n");
|
||||
// enable CRC module clock
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_CRCEN;
|
||||
|
||||
PIN_SET_LOW (LED);
|
||||
while(1) {
|
||||
// blink led every 250ms
|
||||
if (getTick() - blinkTick > 500) {
|
||||
//PIN_TOGGLE (LED);
|
||||
blinkTick = getTick();
|
||||
}
|
||||
|
||||
// implement command reception from usart
|
||||
|
||||
if (usart2_data_available () >= 20) {
|
||||
|
||||
// read data
|
||||
usart2_read_buff (usartBuffer, 20);
|
||||
u8 cmd = usartBuffer[0];
|
||||
switch (cmd) {
|
||||
case CMD_GETID:
|
||||
cmdGetId (usartBuffer);
|
||||
break;
|
||||
|
||||
case CMD_ERASE:
|
||||
cmdErase (usartBuffer);
|
||||
break;
|
||||
|
||||
case CMD_WRITE:
|
||||
cmdWrite(usartBuffer);
|
||||
break;
|
||||
};
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
else {
|
||||
|
||||
// if there is no application to run, blink led fast
|
||||
if (*((u32*)APP_START_ADDRESS) != SRAM_END) {
|
||||
blinkTick = getTick ();
|
||||
while(1) {
|
||||
if (getTick() - blinkTick > 80) {
|
||||
PIN_TOGGLE (LED);
|
||||
blinkTick = getTick();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//Load the application
|
||||
|
||||
/* Deinit GPIO and clocks */
|
||||
GPIOA->MODER = 0x00000000;
|
||||
GPIOA->ODR = 0x00000000;
|
||||
RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN_Msk | RCC_AHB1ENR_GPIOCEN_Msk);
|
||||
|
||||
/* Deinit systick and its interrupt */
|
||||
SysTick->CTRL = 0x0;
|
||||
|
||||
RCC->CIR = 0x00000000;
|
||||
__set_MSP (* ((volatile u32*) APP_START_ADDRESS));
|
||||
__DMB ();
|
||||
// relocate vector table to sector 1 (start of user app)
|
||||
SCB->VTOR = APP_START_ADDRESS;
|
||||
__DSB ();
|
||||
|
||||
// get the memory address of the user application's reset handler
|
||||
u32 jumpAddress = *((volatile u32*) (APP_START_ADDRESS + 4));
|
||||
void (*resetHandler) (void) = (void *) jumpAddress;
|
||||
|
||||
// launch the user application
|
||||
resetHandler ();
|
||||
|
||||
// never reached
|
||||
while(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void cmdGetId (u8* data) {
|
||||
u16 devID;
|
||||
u32 crc = 0;
|
||||
u32 cmd = data[0];
|
||||
|
||||
// copy the crc
|
||||
memcpy (&crc, data+1, sizeof(u32));
|
||||
|
||||
u32 calculatedCrc = calculateCRC (&cmd, 1);
|
||||
|
||||
if (crc == calculatedCrc) {
|
||||
|
||||
devID = (u16) (DBGMCU->IDCODE & 0x0fff);
|
||||
|
||||
// Send acknoledge and device ID
|
||||
data [0] = ACK;
|
||||
usart2_write_buff (data, 1);
|
||||
usart2_write_buff ((u8*)&devID, 2);
|
||||
}
|
||||
|
||||
else {
|
||||
// Send negative acknoledge
|
||||
data [0] = NACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void cmdErase (u8* data) {
|
||||
u32 crc = 0;
|
||||
u32 cmd[] = {data [0], data[1]};
|
||||
|
||||
memcpy (&crc, data +2, sizeof (u32));
|
||||
|
||||
if (crc == calculateCRC (cmd, 2)) {
|
||||
|
||||
/*Erase data [1] flash memory sectors starting from sector 1*/
|
||||
FLASH_Unlock ();
|
||||
FLASH_Erase (FLASH_SECTOR_1, data[1] == 0xff ? FLASH_SECTOR_TOTAL : data[1], FLASH_VOLTAGE_RANGE_3);
|
||||
FLASH_Lock ();
|
||||
data [0] = ACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}
|
||||
|
||||
else {
|
||||
// Send negative acknoledge
|
||||
data [0] = NACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}
|
||||
}
|
||||
|
||||
void cmdWrite(u8* data) {
|
||||
|
||||
u32 sAddr = 0, crc = 0;
|
||||
|
||||
memcpy (&sAddr, data+1, sizeof (u32));
|
||||
memcpy (&crc, data+5, sizeof (u32));
|
||||
|
||||
u32 cmdData [5];
|
||||
for (u8 i=0; i<5; ++i)
|
||||
cmdData[i] = data[i];
|
||||
|
||||
u32 calculatedCrc = calculateCRC(cmdData, 5);
|
||||
|
||||
if (crc == calculatedCrc && sAddr >= APP_START_ADDRESS) {
|
||||
|
||||
data[0] = ACK;
|
||||
usart2_write_buff (data, 1);
|
||||
|
||||
// wait for data
|
||||
while (usart2_data_available() < 20);
|
||||
u8 dataBuffer [20];
|
||||
usart2_read_buff (dataBuffer, 20);
|
||||
memcpy (&crc, dataBuffer+16, sizeof (u32));
|
||||
|
||||
calculatedCrc = calculateCRC ((u32*)dataBuffer, 4);
|
||||
if (crc == calculatedCrc) {
|
||||
|
||||
FLASH_Unlock ();
|
||||
//aes_enc_dec((uint8_t*) data, AES_KEY, 1);
|
||||
for (u8 i=0; i<16; ++i) {
|
||||
FLASH_ProgramByte (sAddr, dataBuffer[i]);
|
||||
sAddr += 1;
|
||||
}
|
||||
FLASH_Lock ();
|
||||
|
||||
data[0] = ACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}else {
|
||||
data[0] = NACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}
|
||||
}else {
|
||||
data[0] = NACK;
|
||||
usart2_write_buff (data, 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void FLASH_Unlock (void) {
|
||||
|
||||
if((FLASH->CR & FLASH_CR_LOCK) != 0) {
|
||||
FLASH->KEYR = FLASH_KEY1;
|
||||
FLASH->KEYR = FLASH_KEY2;
|
||||
}
|
||||
}
|
||||
|
||||
void FLASH_Lock (void) {
|
||||
FLASH->CR |= FLASH_CR_LOCK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void FLASH_Erase (u8 firstSector, u8 nbrSector, u8 voltageLevel) {
|
||||
|
||||
/* Wait for last operation to be completed */
|
||||
FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
||||
|
||||
for (u32 sector = firstSector; sector < (firstSector+nbrSector); sector++) {
|
||||
FLASH_EraseSector(sector, (uint8_t) voltageLevel);
|
||||
|
||||
/* Wait for last operation to be completed */
|
||||
FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
||||
|
||||
/* If the erase operation is completed, disable the SER and SNB Bits */
|
||||
FLASH->CR &= ~(FLASH_CR_SER | FLASH_CR_SNB);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void FLASH_EraseSector (uint32_t Sector, uint8_t VoltageRange) {
|
||||
|
||||
uint32_t tmp_psize = 0U;
|
||||
|
||||
switch (VoltageRange) {
|
||||
case FLASH_VOLTAGE_RANGE_1:
|
||||
tmp_psize = FLASH_PSIZE_BYTE;
|
||||
break;
|
||||
|
||||
case FLASH_VOLTAGE_RANGE_2:
|
||||
tmp_psize = FLASH_PSIZE_HALF_WORD;
|
||||
break;
|
||||
|
||||
case FLASH_VOLTAGE_RANGE_3:
|
||||
tmp_psize = FLASH_PSIZE_WORD;
|
||||
break;
|
||||
default:
|
||||
tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
||||
}
|
||||
|
||||
// reset parallelism and sector number bit
|
||||
FLASH->CR &= FLASH_CR_PSIZE;
|
||||
FLASH->CR &= FLASH_CR_SNB;
|
||||
|
||||
// set program parallelism
|
||||
FLASH->CR |= tmp_psize;
|
||||
// select sector erase mode and the desired sector number
|
||||
FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
|
||||
// start erase operation
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
FLASH_WaitForLastOperation ();
|
||||
}
|
||||
|
||||
void FLASH_WaitForLastOperation () {
|
||||
// wait for operation to complete
|
||||
while((FLASH->SR & FLASH_SR_BSY_Msk) != 0);
|
||||
|
||||
// clear end of operation flag if it was set
|
||||
if ((FLASH->SR & FLASH_SR_EOP_Msk) != 0)
|
||||
FLASH->SR |= FLASH_SR_EOP_Msk;
|
||||
}
|
||||
|
||||
|
||||
void FLASH_ProgramByte (uint32_t Address, u8 Data) {
|
||||
FLASH_WaitForLastOperation ();
|
||||
|
||||
FLASH->CR &= ~(FLASH_CR_PSIZE);
|
||||
FLASH->CR |= FLASH_PSIZE_BYTE;
|
||||
FLASH->CR |= FLASH_CR_PG;
|
||||
|
||||
// write the byte into FLASH as if it was with a normal memory address
|
||||
*(volatile uint8_t*)Address = Data;
|
||||
|
||||
FLASH_WaitForLastOperation ();
|
||||
FLASH->CR &= (~FLASH_CR_PG);
|
||||
}
|
||||
|
||||
|
||||
|
||||
u32 calculateCRC (u32 * buffer, u32 len) {
|
||||
|
||||
|
||||
CRC->CR |= CRC_CR_RESET;
|
||||
|
||||
for (u32 i=0; i<len; ++i) {
|
||||
CRC->DR = buffer[i];
|
||||
}
|
||||
return CRC->DR;
|
||||
}
|
||||
@@ -0,0 +1,270 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if non-shareable) or 010b (if shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,274 @@
|
||||
/*
|
||||
* usart2.c
|
||||
*
|
||||
* Created on: Feb 26, 2023
|
||||
* Author: francesco
|
||||
*/
|
||||
|
||||
|
||||
#include "usart2.h"
|
||||
#include "stm32f446xx.h"
|
||||
|
||||
|
||||
|
||||
#define USART2_RX_BUFFLENGTH 512
|
||||
volatile static u8 usart2_rx_buffer [USART2_RX_BUFFLENGTH];
|
||||
volatile static u16 u2rx_sptr, u2rx_eptr; // define start and end pointers to the circular buffer
|
||||
|
||||
|
||||
#define USART2_TX_BUFFLENGTH 1024
|
||||
volatile static u8 usart2_tx_buffer [USART2_TX_BUFFLENGTH];
|
||||
volatile static u16 u2tx_tail, u2tx_head; // define start and end pointers to the circular buffer
|
||||
|
||||
|
||||
|
||||
|
||||
// in case of either of the buffer overflow, the size must be increased or code
|
||||
// modified for assuring proper operation
|
||||
|
||||
static void usart2_rx_buffer_overflow (void) {
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
static void usart2_tx_buffer_overflow (void) {
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// enable interrupt for tx buffer empty and rx buffer full
|
||||
void usart2_init (void) {
|
||||
|
||||
// enable USART and GPIOA clock
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
|
||||
|
||||
/* ===================================
|
||||
USART2 GPIO Configuration
|
||||
- PA2 ------> USART2_TX, AF7
|
||||
- PA3 ------> USART2_RX, AF7
|
||||
==================================== */
|
||||
// PA2,3 alternate function mode
|
||||
GPIOA->MODER |= (0b10 << (2*2)) | (0b10 << (3*2));
|
||||
// PA2,3 high speed
|
||||
GPIOA->OSPEEDR |= (0b11 << (2*2)) | (0b11 << (3*2));
|
||||
// PA2,3 AF7
|
||||
GPIOA->AFR[0] |= (0b0111 << (2*4)) | (0b0111 << (3*4));
|
||||
|
||||
|
||||
// init all variables used by the usart handling code
|
||||
u2rx_sptr = 0;
|
||||
u2rx_eptr = 0;
|
||||
u2tx_tail = 0;
|
||||
u2tx_head = 0;
|
||||
|
||||
for (u16 i=0; i<USART2_RX_BUFFLENGTH; ++i)
|
||||
usart2_rx_buffer [i] = 0;
|
||||
|
||||
for (u16 i=0; i<USART2_TX_BUFFLENGTH; ++i)
|
||||
usart2_tx_buffer [i] = 0;
|
||||
|
||||
|
||||
// to derive 115200 baud rate from 16MHz clock the divisor must be
|
||||
// set to 8, 11
|
||||
USART2->BRR = (8 << USART_BRR_DIV_Mantissa_Pos) | (11 << USART_BRR_DIV_Fraction_Pos);
|
||||
// enable even (default) parity, oversampling 16 (default)
|
||||
//USART2->CR1 |= (USART_CR1_PCE | USART_CR1_M);
|
||||
|
||||
|
||||
// enable receiver, rx interrupt and usart peripheral
|
||||
USART2->CR1 |= (USART_CR1_UE | USART_CR1_RXNEIE | USART_CR1_RE);
|
||||
|
||||
// enable NVIC interrupt
|
||||
NVIC_SetPriority (USART2_IRQn, 0);
|
||||
NVIC_EnableIRQ (USART2_IRQn);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void usart2_enable (void) {
|
||||
|
||||
// enable receiver and peripheral
|
||||
USART2->CR1 |= (USART_CR1_UE_Msk | USART_CR1_RXNEIE | USART_CR1_RE);
|
||||
}
|
||||
|
||||
void usart2_disable (void) {
|
||||
|
||||
// disable receiver, transmitter and uart peripheral
|
||||
USART2->CR1 &= ~(USART_CR1_UE_Msk | USART_CR1_TE | USART_CR1_RE);
|
||||
}
|
||||
|
||||
|
||||
|
||||
// implement interrupt vector. There is only one interrupt vector for the
|
||||
// entire usart peripheral, so interrupt cause must be determined by
|
||||
// reading ir flags
|
||||
|
||||
|
||||
void USART2_IRQHandler (void) {
|
||||
|
||||
// test for tx register empty flag by also testing if the transmitter is enabled
|
||||
// to make sure that a transmission is going on and it wasn't a spurius interrupt
|
||||
// fiered
|
||||
if ((USART2->CR1 & USART_CR1_TXEIE_Msk) != 0 && (USART2->SR & USART_SR_TXE_Msk) != 0) {
|
||||
|
||||
if (u2tx_tail != u2tx_head) {
|
||||
u2tx_tail = (u2tx_tail + 1) & (USART2_TX_BUFFLENGTH - 1);
|
||||
// if there is data to be transmitted transmit it
|
||||
if (u2tx_tail != u2tx_head) {
|
||||
|
||||
USART2->DR = usart2_tx_buffer [u2tx_tail];
|
||||
}
|
||||
// otherwise disable the transmitter module
|
||||
else {
|
||||
USART2->CR1 &= ~ (USART_CR1_TXEIE);
|
||||
}
|
||||
}
|
||||
|
||||
if (u2tx_tail > u2tx_head) {
|
||||
//__asm__("BKPT");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// test for rx data ready flag
|
||||
if ((USART2->SR & USART_SR_RXNE_Msk) != 0) {
|
||||
// temporarily increment the end pointer of the rx circular buffer and clip it
|
||||
// to the buffer length
|
||||
u16 u2rx_eptr_temp = (u2rx_eptr + 1) & (USART2_RX_BUFFLENGTH -1);
|
||||
u8 data = USART2->DR;
|
||||
|
||||
// do not overwrite the buffer
|
||||
if (u2rx_eptr_temp != u2rx_sptr) {
|
||||
usart2_rx_buffer [u2rx_eptr++] = data;
|
||||
u2rx_eptr = u2rx_eptr_temp;
|
||||
}
|
||||
else {
|
||||
usart2_rx_buffer_overflow ();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
u32 usart2_flush_rx () {
|
||||
|
||||
u32 len = u2rx_eptr < u2rx_sptr ? (USART2_RX_BUFFLENGTH - u2rx_eptr + u2rx_eptr) :
|
||||
(u2rx_eptr - u2rx_sptr);
|
||||
|
||||
u2rx_eptr = 0;
|
||||
u2rx_sptr = 0;
|
||||
return len;
|
||||
}
|
||||
|
||||
u32 usart2_flush_rx_len (u32 count) {
|
||||
|
||||
u32 avail = usart2_data_available ();
|
||||
u32 toFlush = count <= avail? count: avail;
|
||||
|
||||
u2rx_sptr = (u2rx_sptr + toFlush) & (USART2_RX_BUFFLENGTH-1);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void usart2_putch (u8 ch) {
|
||||
|
||||
// temporarily increment the end pointer of the tx circular buffer and clip it
|
||||
// to the buffer length
|
||||
u16 u2tx_head_temp = (u2tx_head + 1) & (USART2_TX_BUFFLENGTH-1);
|
||||
|
||||
// signal if buffer overflow would have occurred
|
||||
if (u2tx_head_temp == u2tx_tail)
|
||||
usart2_tx_buffer_overflow ();
|
||||
|
||||
// wait until there is space available in the tx buffer
|
||||
while (u2tx_head_temp == u2tx_tail);
|
||||
|
||||
|
||||
// do not allow the peripheral to fire a tx interrupt at this point
|
||||
clr_bit (USART2->CR1, USART_CR1_TXEIE);
|
||||
|
||||
// if no transmission was already going on
|
||||
if (u2tx_head == u2tx_tail) {
|
||||
|
||||
usart2_tx_buffer [u2tx_head] = ch;
|
||||
u2tx_head = u2tx_head_temp;
|
||||
USART2->DR = ch;
|
||||
USART2->CR1 |= (USART_CR1_TXEIE | USART_CR1_TE);
|
||||
}
|
||||
else {
|
||||
usart2_tx_buffer [u2tx_head] = ch;
|
||||
u2tx_head = u2tx_head_temp;
|
||||
USART2->CR1 |= USART_CR1_TXEIE;
|
||||
}
|
||||
}
|
||||
|
||||
void usart2_write_buff (u8 * buff, u32 len) {
|
||||
|
||||
for (u32 i=0; i < len; ++i)
|
||||
usart2_putch (buff [i]);
|
||||
}
|
||||
|
||||
|
||||
void usart2_puts (char * buff) {
|
||||
|
||||
while (*buff != 0)
|
||||
usart2_putch (*buff++);
|
||||
}
|
||||
|
||||
|
||||
u32 usart2_read_buff (u8* buff, u32 len) {
|
||||
|
||||
u32 readLen = 0;
|
||||
|
||||
while (u2rx_sptr != u2rx_eptr) {
|
||||
|
||||
buff [readLen++] = usart2_rx_buffer [u2rx_sptr];
|
||||
u2rx_sptr = (u2rx_sptr +1) & (USART2_RX_BUFFLENGTH - 1);
|
||||
}
|
||||
return readLen;
|
||||
}
|
||||
|
||||
/*
|
||||
function usart2_getch ();
|
||||
|
||||
@param c: pointer to the variable to write the read character into
|
||||
@return
|
||||
1: there were data to read
|
||||
0: no valid data was available to be read
|
||||
*/
|
||||
|
||||
u8 usart2_getch (u8 * c) {
|
||||
|
||||
if (u2rx_sptr != u2rx_eptr) {
|
||||
|
||||
u8 data = usart2_rx_buffer [u2rx_sptr];
|
||||
u2rx_sptr = (u2rx_sptr +1) & (USART2_RX_BUFFLENGTH - 1);
|
||||
*c = data;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 usart2_data_available (void) {
|
||||
|
||||
u32 head = u2rx_eptr;
|
||||
u32 tail = u2rx_sptr;
|
||||
|
||||
if (tail != head) {
|
||||
|
||||
if (head < tail) {
|
||||
return (USART2_RX_BUFFLENGTH - tail + head);
|
||||
}else {
|
||||
return (head - tail);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* usart2.h
|
||||
*
|
||||
* Created on: Feb 26, 2023
|
||||
* Author: francesco
|
||||
*/
|
||||
|
||||
#ifndef USART2_H_
|
||||
#define USART2_H_
|
||||
|
||||
|
||||
#include "core.h"
|
||||
|
||||
void usart2_init (void);
|
||||
void usart2_set_baudrate (u32 baudrate);
|
||||
void usart2_enable (void);
|
||||
void usart2_disable (void);
|
||||
void usart2_putch (u8 ch);
|
||||
void usart2_write_buff (u8* buff, u32 len);
|
||||
u32 usart2_read_buff (u8* buff, u32 len);
|
||||
void usart2_puts (char * buff);
|
||||
u32 usart2_data_available (void);
|
||||
u8 usart2_getch (u8 * c);
|
||||
|
||||
|
||||
u32 usart2_flush_rx ();
|
||||
u32 usart2_flush_rx_len (u32 count);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* USART2_H_ */
|
||||
@@ -0,0 +1,535 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f446xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F446xx Devices vector table for GCC based toolchains.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word CAN1_TX_IRQHandler /* CAN1 TX */
|
||||
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
|
||||
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
|
||||
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
||||
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
|
||||
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FMC_IRQHandler /* FMC */
|
||||
.word SDIO_IRQHandler /* SDIO */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SPI4_IRQHandler /* SPI4 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SAI1_IRQHandler /* SAI1 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SAI2_IRQHandler /* SAI2 */
|
||||
.word QUADSPI_IRQHandler /* QuadSPI */
|
||||
.word CEC_IRQHandler /* CEC */
|
||||
.word SPDIF_RX_IRQHandler /* SPDIF RX */
|
||||
.word FMPI2C1_EV_IRQHandler /* FMPI2C 1 Event */
|
||||
.word FMPI2C1_ER_IRQHandler /* FMPI2C 1 Error */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI2_IRQHandler
|
||||
.thumb_set SAI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPDIF_RX_IRQHandler
|
||||
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMPI2C1_EV_IRQHandler
|
||||
.thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMPI2C1_ER_IRQHandler
|
||||
.thumb_set FMPI2C1_ER_IRQHandler,Default_Handler
|
||||
Reference in New Issue
Block a user